Low-overhead Built-in Bist Reseeding

Reseeding is used to improve fault coverage in pseudo-random testing. Most of the work done on reseeding is based on storing the seeds in an external tester. Besides its high cost, testing using automatic test equipments (ATEs) makes it hard to test the circuit while in the system. In this paper, we present a technique for built-in reseeding. Our technique requires no storage for the seeds. The seeds are encoded in hardware. The seeds we use are deterministic so 100% fault coverage can be achieved. Our technique causes no performance overhead and does not change the original circuit under test. Compared to previous work, our technique takes less area overhead. Also, the technique we present is applicable for single-stuck-at faults as well as transition faults. In our technique, we expand every seed to as many ATPG patterns as possible. This is different from many existing reseeding techniques that expand every seed into a single ATPG pattern. This paper presents the built-in reseeding algorithm together with the hardware synthesis algorithm and implementation for both single-stuck-at faults as well as transition faults.